Beyond 0 and 1’s: Why & how ternary for computing

For more than 80 years computers use a binary alphabet of two symbols: 0 and 1. Imagine making English sentences with just two letters! With one extra symbol, a ternary alphabet, both traditional and emerging computer paradigms (quantum, photonic, etc.) can theoretically become more energy efficient and secure, faster, smaller and ultimately at lower cost. Interestingly, this idea is not new and in 1838 Thomas Fowler created the first mechanical ternary computer. In 1958 the SETUN, the first electrical ternary computer was build. Pioneers in binary computing like Atanasoff, Von Neumann and Shannon all considered ternary for fundamental reasons.

Now is the time to learn why Microsoft Research recently embraced balanced ternary for AI including energy efficient and high performant Large Language Models (LLMs). Furthermore, both academia and industry acknowledge the need to focus on efficiency-centric scaling instead of device-centric scaling with its recent IRDS Beyond CMOS roadmap. Industry adoption can be seen in various recent standards including USB 4.2 , Thunderbolt 5 and I3C for communication and GDDR 7 SDRAM for memory which all feature ternary signals and/or encoding. Application domains include the automative sector, IoT, cybersecurity and more.

Join me in this 45 minute talk + 15 min discussion which kicks off why binary is increasingly struggling due to the continuation of Moore’s Law (doubling of transistor density every 2 years). Other topics highlight the unique benefits that balanced ternary numbers have, academic results from the frontlines and a roadmap towards a ternary technology stack.

This talk will be accessible to a broad audience, not requiring specific math knowledge or other technical knowledge. Most slides contain academic references for those interested in a deeper understanding of the presented subject matter.

Speaker bio

Steven Bos is an associate professor at USN, teaching Computer Science and Electrical Engineering. Recently recognized as one of six promising researchers at USN, he holds an MSc in Computer Science from TU Delft and a PhD in Technology from USN. His research focuses on designing ternary logic microprocessors using CMOS, multi-state memristors, and carbon nanotube transistors. In 2019, he co-founded the Ternary Research Group at USN with Henning Gundersen, a 20-year ternary semiconductor veteran. Notable achievements include the REBEL instruction set architecture (ISA), MRCS, a browser-based tool for designing ternary chips, and R2R, a C language to REBEL compiler with benchmarks comparing to traditional binary execution.